The present invention relates generally to reference circuits, and more particularly relates to a dynamic low power reference circuit.
Many circuits employed in a variety of system applications require a reference source (e.g., reference voltage or reference current), in addition to traditional power supply voltages (e.g., VDD and VSS). With respect to a particular circuit or system, the reference source may be generated either internally or externally. In either case, the reference source consumes a certain amount of quiescent or direct current (DC) power.
It is advantageous, especially in portable devices and other low power systems, to minimize the amount of power consumed by the reference source. Quite often, in order to conserve power, a single reference source is utilized in conjunction with a global reference conductor (e.g., bias line) for supplying a reference voltage or reference current to multiple circuits which may be distributed across an integrated circuit (IC) device. For example, the global reference conductor is typically routed throughout the IC to all sub-circuits which utilize the reference voltage or current. In this manner, the need for individual local reference sources within each sub-circuit may be eliminated, thus reducing overall DC power consumption in the IC. However, the routing of the reference conductor throughout the IC can be difficult, particularly in densely fabricated ICs where interconnect space is already scarce. Furthermore, capacitive coupling associated with such a reference conductor may induce noise onto the conductor, thus corrupting the reference voltage or current. The noise may be generated, for example, by the switching of digital circuits, crosstalk, etc. as may be present in the IC.
To minimize the likelihood of noise coupling onto the reference conductor, a low-impedance reference source can be used, thus maintaining a sufficiently constant voltage or current even in the presence of noise. However, a lower output impedance of the reference source is achieved at the expense of an undesirable increase in DC power consumption in the reference source.
Accordingly, it would be desirable to provide a reference circuit having a low output impedance for reducing the coupling of noise onto the reference output, and which consumes a minimal amount of overall DC power.
The present invention provides a reference circuit that is capable of dynamically changing an output impedance associated therewith, such that when activity is detected on a given node, for example, in another circuit coupled to the reference circuit, the output impedance of the reference circuit is at a first value which is sufficiently low so as to reduce the likelihood of noise being undesirably coupled onto the output of the reference circuit. Alternatively, when essentially no activity is detected on the node within a predetermined time period, the output impedance of the reference circuit is at a second value which is sufficiently greater than the first value so as to reduce power consumption in the reference circuit.
In accordance with one aspect of the invention, a dynamic low power reference circuit includes a reference source for generating a reference voltage and/or a reference current. The reference circuit further includes an activity detector configured to measure an activity level of at least a portion of another circuit coupled to the reference circuit (e.g., in an IC which includes the reference circuit), and to generate a control signal representative of the activity level. A controller coupled to the reference source is configured to dynamically change an output impedance of the reference circuit in response to the control signal, such that the output impedance is substantially reduced when activity is detected.
These and other features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.